搜索资源列表
DCT-vhdl
- 这是一个二维 8*8块的离散余弦变换(DCT)以及反变换(IDCT)算法,采用VHDL实现
dct
- 里面含有vhdl和verilog 版本,很好用!dct变换用得很多啊!
DCT
- 一种改进的一维DCT方案设计与实现,采用VHDL硬件语言描述,DCT以及IDCT
butterfly.rar
- 蝶形运算，可用于DCT变换，FFT变换的模块,Butterfly computation, can be used for DCT transform, FFT transform module
two_d_dct_serial
- Verilog codes for 2D Discrete Cosine Transform (DCT)
equizer
- HART协议的均衡器设计 DCT LMS 设计 + 位同步设计，仿真证明了设计的有效性-HART protocol design DCT LMS equalizer design+ Bit synchronous design, simulation proves the validity of the design
2DImageFilterByVHDL
- 用VHDL语言编程实现2维图像的滤波算法，简单精辟-VHDL programming language used to achieve 2-D image filtering algorithm, simple brilliant
Ssemple
- 水印程序，dct变换，水印的提取和嵌入功能，并且和mapX结合-Watermarking procedures, dct transform, extraction and watermark embedding function, and combining and MapX
jpeg.tar
- This project features a complete JPEG Hardware Compressor (standard Baseline DCT, JFIF header) with 2:1:1 subsampling, able to compress at a rate of up to 24 images per second (on XC2V1000-4 @ 40 MHz with resolution 352x288). Image resolution is no
dct2
- 这个是一个基于FPGA的数字图像的整数DCT变换程序，程序高性能地实现了2维DCT变换。-This is an FPGA-based digital image of the integer DCT transform process and procedures to achieve high-performance 2-D DCT transform.
butterfly-verilog
- VHDL的DCT变换.蝶型算法,很好用的,希望能有帮助-The DCT transform VHDL. Butterfly algorithm, very good with the hope that it can be helpful
xapp610
- Verilog code for 2D-DCT with detailed documentation.
two_d_dct_serial
- 二维DCT变换，采用查找表的方法实现算法，分别通过列变换，再通过行变换，通过加法器乘法器以及流水线技术得出更快的结果！-two-dimention DCTtransform,the algorithm was implemented by look up table,via row trasforming and colum trasforming respectively
TDC_3
- This is a matrixl 8 * 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realiz-This is a matrixl 8* 8 discrete cosine transform (DCT) and inverse transform (IDCT) algorithms using VHDL realiz
63535312DCTofJPEG
- 用verilog代码实现JPEG压缩编码过程中的DCT模块，用移位加法实现了乘法-Verilog code using JPEG compression encoding process to achieve the DCT module, with the shift to achieve the multiplication addition
mpeg2_idct_hw
- 2-D的DCT/IDCT在軟硬體上的verilog code-dct/idct source code for soc
verilogdct
- dct实现verilog hdl的数字图像处理，源代码-dct achieve verilog hdl digital image processing, source code
Lab4b_24897141
- this is vhdl behavorial model of a dct chip at an algorithmic level
dctalgo
- vhdl coding for dct algorithm
addersubtractor10
- vhdl coding for adder subtractor used in dct